? semiconductor components industries, llc, 2003 june, 2003 - rev. 9 1 publication order number: mc74hct14a/d mc74hct14a hex schmitt-trigger inverter with lsttl compatible inputs high-performance silicon-gate cmos the mc74hct14a may be used as a level converter for interfacing ttl or nmos outputs to high-speed cmos inputs. the hct14a is useful to square upo slow input rise and fall times. due to the hysteresis voltage of the schmitt trigger, the hct14a finds applications in noisy environments. ? output drive capability: 10 lsttl loads ? ttl/nmos-compatible input levels ? outputs directly interface to cmos, nmos, and ttl ? operating voltage range: 4.5 to 5.5 v ? low input current: 1.0 a ? in compliance with the requirements defined by jedec standard no. 7a ? chip complexity: 72 fets or 18 equivalent gates 2500/reel soic-14 mc74hct14adr2 device package shipping ordering information mc74hct14an pdip-14 2000/box mc74hct14ad soic-14 55/rail marking diagrams a = assembly location l, wl = wafer lot y, yy = year w, ww = work week 1 14 pdip-14 n suffix case 646 mc74hct14an awlyyww soic-14 d suffix case 751a 1 14 hct14a awlyww mc74hct14adtr2 tssop-14 2000/reel MC74HCT14AFEL eiaj-14 2000/reel tssop-14 dt suffix case 948g hct 1 14 alyw 14a http://onsemi.com eiaj-14 f suffix case 965 1 14 hct14a awlyww
mc74hct14a http://onsemi.com 2 figure 1. pin assignment pin 14 = v cc pin 7 = gnd y = a a1 1 2 y1 a2 3 4 y2 a3 5 6 y3 a4 9 8 y4 a5 11 10 y5 a6 13 12 y6 function table input a output y figure 2. logic diagram 11 12 13 14 8 9 10 5 4 3 2 1 7 6 y5 a5 y6 a6 v cc y4 a4 y2 a2 y1 a1 gnd y3 a3 l h h l
mc74hct14a http://onsemi.com 3 maximum ratings (note 1) symbol parameter value unit v cc dc supply voltage (referenced to gnd) 0.5 to 7.0 v v i dc input voltage (referenced to gnd) 0.5 to v cc 0.5 v v o dc output voltage (referenced to gnd) 0.5 to v cc 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 25 ma i o dc output sink current 25 ma i cc dc supply current per supply pin 50 ma i gnd dc ground current per ground pin 50 ma t stg storage temperature range 65 to 150 c t l lead temperature, 1 mm from case for 10 seconds 260 c t j junction temperature under bias 150 c ja thermal resistance pdip soic tssop 78 125 170 c/w p d power dissipation in still air at 85 c pdip soic tssop 750 500 450 mw msl moisture sensitivity level 1 f r flammability rating oxygen index: 30% - 35% ul-94-vo (0.125 in) v esd esd withstand voltage human body model (note 2) machine model (note 3) charged device model (note 4) >4000 >300 >1000 v i latch- up latch-up performance above v cc and below gnd at 85 c (note 5) 300 ma 1. absolute maximum continuous ratings are those values beyond which damage to the device may occur. extended exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. functional operation under absolute maximum-rated conditions is not implied. 2. tested to eia/jesd22-a114-a. 3. tested to eia/jesd22-a115-a. 4. tested to jesd22-c101-a. 5. tested to eia/jesd78. 6. for high frequency or heavy load considerations, see the on semiconductor high- speed cmos data book (dl129/d). recommended operating conditions symbol parameter min max unit ???? ???? v cc ????????????????????? ????????????????????? dc supply voltage (referenced to gnd) ????? ????? 4.5 ???? ???? 5.5 ??? ??? v ???? ???? v i , v o ????????????????????? ????????????????????? dc input voltage, output voltage (referenced to gnd) ????? ????? 0 ???? ???? v cc ??? ??? v ???? ???? t a ????????????????????? ????????????????????? operating temperature, all package types ????? ????? 55 ???? ???? 125 ??? ??? c ???? ???? t r , t f ????????????????????? ????????????????????? input rise and fall time (figure 3) ????? ????? e ???? ???? (note 7) ??? ??? ns 7. no limit when v i 50% v cc , i cc > 1 ma. 8. unused inputs may not be left open. all inputs must be tied to a high-logic voltage level or a low-logic input voltage level.
mc74hct14a http://onsemi.com 4 dc electrical characteristics (voltages referenced to gnd) temperature limit v cc 55 c to 25 c 85 c 125 c symbol parameter test conditions volts min max min max min max unit ???? ? ?? ? ???? v t max ???????? ? ?????? ? ???????? maximum positive-going input threshold voltage ????????? ? ??????? ? ????????? v o = 0.1 v or v cc 0.1 v |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ??? ? ? ? ??? ??? ? ? ? ??? 1.9 2.1 ??? ? ? ? ??? ?? ?? ?? 1.9 2.1 ??? ? ? ? ??? ??? ? ? ? ??? 1.9 2.1 ?? ?? ?? v ???? ???? v t min ???????? ???????? minimum positive-going input threshold voltage ????????? ????????? v o = 0.1 v or v cc 0.1 v |i out | 20 a ??? ??? 4.5 5.5 ??? ??? 1.2 1.4 ??? ??? ??? ??? 1.2 1.4 ?? ?? ??? ??? 1.2 1.4 ??? ??? ?? ?? v ???? ? ?? ? ???? v t max ???????? ? ?????? ? ???????? maximum negative-going input threshold voltage ????????? ? ??????? ? ????????? v o = 0.1 v or v cc 0.1 v |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ??? ? ? ? ??? ??? ? ? ? ??? 1.2 1.4 ??? ? ? ? ??? ?? ?? ?? 1.2 1.4 ??? ? ? ? ??? ??? ? ? ? ??? 1.2 1.4 ?? ?? ?? ???? ? ?? ? ???? v t min ???????? ? ?????? ? ???????? minimum negative-going input threshold voltage ????????? ? ??????? ? ????????? v o = 0.1 v or v cc 0.1 v |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ??? ? ? ? ??? 0.5 0.6 ??? ? ? ? ??? ??? ? ? ? ??? 0.5 0.6 ?? ?? ?? ??? ? ? ? ??? 0.5 0.6 ??? ? ? ? ??? ?? ?? ?? ???? ???? v h max ???????? ???????? maximum hysteresis voltage ????????? ????????? v o = 0.1 v or v cc 0.1 v |i out | 20 a ??? ??? 4.5 5.5 ??? ??? ??? ??? 1.4 1.5 ??? ??? ?? ?? 1.4 1.5 ??? ??? ??? ??? 1.4 1.5 ?? ?? ???? ? ?? ? ???? v h min ???????? ? ?????? ? ???????? minimum hysteresis voltage ????????? ? ??????? ? ????????? v o = 0.1 v or v cc 0.1 v |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ??? ? ? ? ??? 0.4 0.4 ??? ? ? ? ??? ??? ? ? ? ??? 0.4 0.4 ?? ?? ?? ??? ? ? ? ??? 0.4 0 4 ??? ? ? ? ??? ?? ?? ?? ???? ? ?? ? ???? v oh ???????? ? ?????? ? ???????? minimum high-level output voltage ????????? ? ??????? ? ????????? v i < v t min |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ??? ? ? ? ??? 4.4 5.4 ??? ? ? ? ??? ??? ? ? ? ??? 4.4 5.4 ?? ?? ?? ??? ? ? ? ??? 4.4 5.4 ??? ? ? ? ??? ?? ?? ?? v ???? ???? ???????? ???????? ????????? ????????? v i < v t min |i out | 4.0 ma ??? ??? 4.5 ??? ??? 3.98 ??? ??? ??? ??? 3.84 ?? ?? ??? ??? 3.7 ??? ??? ?? ?? ???? ? ?? ? ???? v ol ???????? ? ?????? ? ???????? maximum low-level output voltage ????????? ? ??????? ? ????????? v i v t max |i out | 20 a ??? ? ? ? ??? 4.5 5.5 ??? ? ? ? ??? ??? ? ? ? ??? 0.1 0.1 ??? ? ? ? ??? ?? ?? ?? 0.1 0.1 ??? ? ? ? ??? ??? ? ? ? ??? 0.1 0.1 ?? ?? ?? v ???? ???? ???????? ???????? ????????? ????????? v i v t max |i out | 4.0 ma ??? ??? 4.5 ??? ??? ??? ??? 0.26 ??? ??? ?? ?? 0.33 ??? ??? ??? ??? 0.4 ?? ?? ???? ? ?? ? ???? i ik ???????? ? ?????? ? ???????? maximum input leakage current ????????? ? ??????? ? ????????? v i = v cc or gnd ??? ? ? ? ??? 5.5 ??? ? ? ? ??? ??? ? ? ? ??? 0.1 ??? ? ? ? ??? ?? ?? ?? 1.0 ??? ? ? ? ??? ??? ? ? ? ??? 1.0 ?? ?? ?? a ???? ? ?? ? ???? i cc ???????? ? ?????? ? ???????? maximum quiescent supply current (per package) ????????? ? ??????? ? ????????? v i = v cc or gnd i out = 0 a ??? ? ? ? ??? 5.5 ??? ? ? ? ??? ??? ? ? ? ??? 1.0 ??? ? ? ? ??? ?? ?? ?? 10 ??? ? ? ? ??? ??? ? ? ? ??? 40 ?? ?? ?? a 55 c 25 c to 125 c ???? ? ?? ? ???? i cc ???????? ? ?????? ? ???????? additional quiescent supply current ????????? ? ??????? ? ????????? v i = 2.4 v, any one input v i = v cc or gnd, other inputs l out = 0 a ??? ? ? ? ??? 5.5 ??????? ? ????? ? ??????? 2.9 ?????? ? ???? ? ?????? 2.4 ?? ?? ?? ma 9. information on typical parametric values can be found in the on semic onductor high- speed cmos data book (dl129/d). ac characteristics (c l = 50 pf; input t r = t f = 6.0 ns) guaranteed limit 55 c to 25 c 85 c 125 c symbol parameter test conditions figures min max min max min max unit ???? ? ?? ? ???? t plh , t phl ???????? ? ?????? ? ???????? maximum propagation delay, input a to output y (l to h) ???????? ? ?????? ? ???????? v cc = 5.0 v 10% c l = 50 pf, input t r = t f = 6.0 ns ???? ? ?? ? ???? 3 & 4 ??? ? ? ? ??? ??? ? ? ? ??? 32 ??? ? ? ? ??? ?? ?? ?? 40 ??? ? ? ? ??? ??? ? ? ? ??? 48 ?? ?? ?? ns ???? ? ?? ? ???? t tlh , t thl ???????? ? ?????? ? ???????? maximum output transition time, any output ???????? ? ?????? ? ???????? v cc = 5.0 v 10% c l = 50 pf, input t r = t f = 6.0 ns ???? ? ?? ? ???? 3 & 4 ??? ? ? ? ??? ??? ? ? ? ??? 15 ??? ? ? ? ??? ?? ?? ?? 19 ??? ? ? ? ??? ??? ? ? ? ??? 22 ?? ?? ?? ns 10.for propagation delays with loads other than 50 pf, and information on typical parametric values, see the on semiconductor h igh- speed cmos data book (dl129/d). typical @ 25 c, v cc = 5.0 v c pd power dissipation capacitance, per inverter (note 11) 32 pf 11. used to determine the no- load dynamic power consumption: p d = c pd v cc 2 f + i cc v cc . for load considerations, see the on semiconductor high- speed cmos data book (dl129/d).
mc74hct14a http://onsemi.com 5 *includes all probe and jig capacitance. c l * test point device under test output figure 3. switching waveforms figure 4. test circuit input a output y t f t r 3 v gnd t phl t plh t tlh t thl 2.7 v 1.3 v 0.3 v 90% 1.3 v 10%
mc74hct14a http://onsemi.com 6 package dimensions pdip-14 n suffix case 646-06 issue m 17 14 8 b a dim min max min max millimeters inches a 0.715 0.770 18.16 18.80 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l m --- 10 --- 10 n 0.015 0.039 0.38 1.01 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. f hg d k c seating plane n -t- 14 pl m 0.13 (0.005) l m j 0.290 0.310 7.37 7.87 soic-14 d suffix case 751a-03 issue f notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. -a- -b- g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t -t- f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019
mc74hct14a http://onsemi.com 7 package dimensions tssop-14 dt suffix case 948g-01 issue o dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c --- 1.20 --- 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l -u- seating plane 0.10 (0.004) -t- ?? ?? section n-n detail e j j1 k k1 detail e f m -w- 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t -v- 14x ref k n n so eiaj-14 f suffix case 965-01 issue o h e a 1 dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 1.42 --- 0.056 a 1 h e q 1 l e 10 0 10 l e q 1 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). 0.13 (0.005) m 0.10 (0.004) d z e 1 14 8 7 e a b view p c l detail p m a b c d e e 0.50 m z
mc74hct14a http://onsemi.com 8 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. typicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 2-9-1 kamimeguro, meguro-ku, tokyo, japan 153-0051 phone : 81-3-5773-3850 on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74hct14a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303-675-2175 or 800-344-3860 toll free usa/canada fax : 303-675-2176 or 800-344-3867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 800-282-9855 toll free usa/canada
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